More information on my current research can be found on the ENSG page.
History
I started my PhD in 2013 inside the RUN team, in the EpI project supervised by Laurent Mathy.
Our research project was all about creating fast software middleboxes, and more generally fast virtual network functions (VNFs). To handle middleboxes features like IDS, Firewall, DPI on a datacenter or near a core router, one has to use either multiple general-purpose processors, or fast boxes mostly based on NPU or FPGA which are not really upgradable. Our goal is to come with a software architecture that would be able to handle very fast speed (~100Gbits/seconds) for any kind of VNFs on commodity hardware.
The first part of my work has been to find a strong basis for high-speed I/O to build upon. We decided to use the Click Modular Router and extend it to do flow processing and use it as a “Click Modular Middlebox”. However, after some months we found that many things could be improved regarding the usage of underlying frameworks like DPDK and Netmap, usage of batching (both I/O and compute batching) and multi-queue, leading to a first ANCS 2015 paper. A year later, I did an internship at Cisco Meraki, where I tried techniques on their product, uncovering new problems and leading to new discoveries.
Since then, we extended FastClick to unify the classification, session mappings and stack services on behalf of the VNFs. This does not only lead to convenient services for VNFs developers, it also allows to minimize and factorize the classification, avoiding redundant operations across VMs. The stack allows for on-the-fly modification of any flow (such as HTTP or TCP flows), managing SEQs and ACKs on behalf of the user. A presentation poster has been accepted at EuroSys 2018. A subsequent invited paper has been presented at HPSR 2018. The codename of the implementation is .
To enable efficient usage of the infrastructure around the dataplane itself, I collaborated with people at the KTH Institute of Technology to come up with paper was presented at NSDI 2018.
. Metron is a controller that enables offloading classification inside SDN switches and use NIC’s capabilities to directly deliver packets to the right FastClick process, avoiding any inter-core switch. TheAfter my PhD graduation, I joined the NSLab team at KTH in July 2018, to work on Metron‘s next phase, towards a global, low-latency Internet.
I worked at KTH for 3 years as a post-doc to work on the ULTRA project, an ERC consolidated grant awarded to Dejan Kostic.
The goal of the Metron. The services built by ULTRA will be an enabler for emerging applications such as intelligent transportation systems, the Internet of Things and e-health.
is to build internet services with ultra-low latency. We aimed to make the Internet services work at the true speed of the underlying hardware, a bit of which started withWe observed the exponential growth of both Ethernet speeds and the number of CPU cores called for a new processing model for high-speed networking. Our new approach, paper was published at CoNEXT 2019.
, aims to answer the key question in this domain: which CPU core should get an incoming packet? RSS++ achieves very good load balancing over multiple CPU cores by exploiting opportunistic and controlled flow migration (utilizing a new design that enables lockless and zero-copy migration of state between CPU cores). RSS++After addressing the problem of intra-server load-balancing, it was natural to address inter-server load-balancing. We built paper publised at NSDI 2020 presenting a new load balancer that solves the challenge of remembering which connection was sent to which server without the traditional trade-off between uniform load balancing and efficiency. Cheetah is up to 5 times faster than stateful load balancers and can support advanced balancing mechanisms that reduce the flow completion time by a factor of 2 to 3x without breaking connections, even while adding and removing servers.
, aIn our recent paper presented at ASPLOS’21 we showed the limits of current kernel bypass solutions such as DPDK and propose a new buffering model that has improved memory locality. Combined with a pipeline of source-to-source compilation and LLVM passes, the throughput increases by up to 70% for memory intensive network functions. While those improvements are generic, applied to FastClick it becomes the fastest than all the open-source packet processing frameworks publicly available. The extended abstract is already available.
A lot of stateful high-speed applications rely on connection tracking. We verfore revisited high-speed software on modern servers, using various hash-tables implementations. On top of being a general survey, our paper also study the impact of maintainance, that is deleting connections after some time which is a often a forgotten, but very important aspect of tracking. The paper was presented at HPSR 2021.
We then studied paper presented at PAM 2021. could help with rules offloading, for connection tracking but also other scenario, as it was used in Metron and RSS++ which led to a
On top of the 3 conferences papers, 2021 saw the realization of 3 extended papers in journals, , and .
In 2022 we published, “ ” that won the community award at NSDI 2022, resulting from my work on ULTRA, finalizing 3 years of post-doc. When packets that need to be processed in the same way are consecutive, i.e., exhibit high temporal and spatial locality, caches deliver great benefits. We built Reframer, a software solution that deliberately delays packets and reorders them to increase traffic locality. Despite introducing μs-scale delays of some packets, Reframer increases the throughput of a network service chain by up to 84% and reduces the flow completion time of a web server by 11% while improving its throughput by 20%. This project contributed an important part of the trivia behind my current research on network schedulers.
In a collaboration with Zakir Durumeric and his team at Stanford, we published to be presented in ACM SIGCOMM’22, a network forensics framework able to answer precise security questions that can withstand up to 160Gbps with zero packet loss. Retina uses Rust compilation-time optimization and hardware offload instead of run-time classification to enable such speeds.
With the team at KTH, we proposed published at USENIX NSDI’23 which is splitting headers of packets on a Tofino switch, storing the payload on servers not currently using their full bandwidth using RDMA. Headers are meanwhile sent to an oracle machine. This enables inspection of every packet on the oracle, advanced scheduling use case (Reframer itself is one use case) with terabit-worth of data on a single host.
,In July 2021 I started working as a post-doc with the IP Networking Lab (INL) of Olivier Bonaventure at the ICTEAM department of UCLouvain, in Belgium. Their expertise on network protocols combined with my expertise on high-speed dataplanes is leading to exciting, but still undergoing work. We published a SIGCOMM CCR editorial about how addresses might solve many problems, including load-balancing and datacenter disaggregation.
Publications
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- M. Scazzariello, T. Caiazzi, H. Ghasemirahni, T. Barbette, D. Kostić, M. Chiesa , A High-Speed Stateful Packet Processing Approach for Tbps Programmable Switches, USENIX NSDI’23, 2023 ; Ribosome
- Gerry, Wan Fengchen, Gong Barbette, Tom Barbette, Zakir Durumeric, Retina: Analyzing 100 GbE Traffic on Commodity Hardware, ACM SIGCOMM 2022, 2022 Amsterdam ; Retina
- M. Piraux, T Barbette, N. Rybowski, L. Navarre, T. Alfroy, C. Pelsser, F. Michel and O. Bonaventure, Editorial : The multiple roles that IPv6 addresses can play in today’s Internet, SIGCOMM Computer Communication Review (SIGCOMM CCR), July 2022. ; The multiple roles of IPv6
- Ghasemirahni H., Barbette T., Katsikas G. P., Farshin A., Roozbeh A., Girondi M., Chiesa M., Maguire Jr. G. Q., and Kostić D., Packet Order Matters! Improving Application Performance by Deliberately Delaying Packets, NSDI, 2022 ; Packet Order Matters
- Barbette T., Soldani C., Mathy L., Combined stateful classification and session splicing for high-speed NFV service chaining, IEEE/ACM Transactions on Networking, IEEE/ACM, 2021, 15 pages ; MiddleClickToN
- Katsikas G. P., Barbette T., Kostic D., Steinert R., & Maguire Jr G. Q., Metron: High Performance NFV Service Chaining Even in the Presence of Blackboxes, ACM Transactions on Computer Systems 38, 1–2, Article 3 (July 2021), 45 pages ; Metron ToCS
- T. Barbette, E. Wu, D. Kostić, G. Q. Maguire, P. Papadimitratos and M. Chiesa, Cheetah: A High-Speed Programmable Load-Balancer Framework With Guaranteed Per-Connection-Consistency, in IEEE/ACM Transactions on Networking, IEEE/ACM, 2021, 14 pages ; Cheetah ToN
- Girondi Massimo, Chiesa Marco & Barbette Tom. High-speed Connection Tracking in Modern Servers, HPSR’21 ; ConnTrack
- Katsikas, G. P., Barbette, T., & Maguire Jr, G. Q. What you need to know about (Smart) Network Interface Cards. PAM 2021 ; NICBench
- Alireza Farshin, Tom Barbette, Amir Roozbeh, Gerald Q. Maguire Jr, and Dejan Kostic ; PacketMill: Toward per-core 100-Gbps Networking ; ASPLOS’21 ; PacketMill ; Extended Abstract ;
- A High-Speed Load-Balancer Design with Guaranteed Per-Connection-Consistency ; Tom Barbette, Chen Tang, Haoran Yao, Dejan Kostić, Gerald Q. Maguire Jr., Panagiotis Papadimitratos, and Marco Chiesa ; NSDI’20 ; Cheetah
- RSS++: load and state-aware receive side scaling ; Tom Barbette, Georgios P. Katsikas, Gerald Q. Maguire Jr., and Dejan Kostić ; CoNEXT’19 ; RSS++ ; Video ; Slides
- Building a chain of high-speed VNFs in no time ; Tom Barbette, Cyril Soldani, Romain Gaillard and Laurent Mathy ; HPSR’18 (invited paper) ; MiddleClick
- Architecture for a programmable network infrastructure ; T Barbette ; PhD Thesis
- A low-level dive into building a high-speed NFV dataplane for service chaining ; T Barbette, C Soldani, R Gaillard, L Mathy ; EuroSys’18 Open Call Poster Session ; MiddleClick
- Metron: NFV Service Chains at the True Speed of the Underlying Hardware ; GP Katsikas, T Barbette, D Kostic, R Steinert, GQ Maguire Jr ; NSDI’18 ; Metron
- Fast userspace packet processing ;T Barbette, C Soldani, L Mathy ; ANCS’15 ; FastClick
- Implémentation d’un Système de Contrôle Domotique ; T Barbette ; Master Thesis