{"id":43,"date":"2014-01-05T15:56:32","date_gmt":"2014-01-05T15:56:32","guid":{"rendered":"http:\/\/queen.run.montefiore.ulg.ac.be\/~barbette\/?page_id=43"},"modified":"2025-08-06T15:28:43","modified_gmt":"2025-08-06T13:28:43","slug":"research-project","status":"publish","type":"page","link":"https:\/\/perso.uclouvain.be\/tom.barbette\/research-project\/","title":{"rendered":"Research"},"content":{"rendered":"\n
With my group, we are working on designing, implementing and validating a new but backward-compatible network architecture based on the novel programmable network infrastructure, such as SmartNICs and P4. To this end, we tackle systems problems related to high-speed networking and large scale load-balancing.\n

More information on my current research can be found on the ENSG page<\/a>.<\/p>\n

History<\/h1>\n

I started my PhD in 2013<\/strong> inside the RUN team,<\/a> in the EpI project supervised by Laurent Mathy<\/a>.<\/p>\n

Our research project was all about creating fast software middleboxes, and more generally fast virtual network functions (VNFs). To handle middleboxes features like IDS, Firewall, DPI on a datacenter or near a core router, one has to use either multiple general-purpose processors, or fast boxes mostly based on NPU or FPGA which are not really upgradable. Our goal is to come with a software architecture that would be able to handle very fast speed (~100Gbits\/seconds) for any kind of VNFs on commodity hardware.<\/p>\n

The first part of my work has been to find a strong basis for high-speed I\/O to build upon. We decided to use the Click Modular Router and extend it to do flow processing and use it as a “Click Modular Middlebox”. However, after some months we found that many things could be improved regarding the usage of underlying frameworks like DPDK and Netmap, usage of batching (both I\/O and compute batching) and multi-queue, leading to a first ANCS 2015<\/strong> paper<\/a>. A year later, I did an internship at Cisco Meraki, where I tried FastClick<\/span> techniques on their product, uncovering new problems and leading to new discoveries.<\/p>\n

Since then, we extended FastClick to unify the classification, session mappings and stack services on behalf of the VNFs. This does not only lead to convenient services for VNFs developers, it also allows to minimize and factorize the classification, avoiding redundant operations across VMs. The stack allows for on-the-fly modification of any flow (such as HTTP or TCP flows), managing SEQs and ACKs on behalf of the user. A presentation poster<\/a> has been accepted at EuroSys 2018<\/strong><\/a>. A subsequent invited paper<\/a> has been presented at HPSR 2018<\/strong><\/a>. The codename of the implementation is MiddleClick<\/span>.<\/p>\n

To enable efficient usage of the infrastructure around the dataplane itself, I collaborated with people at the KTH Institute of Technology to come up with Metron<\/span>. Metron is a controller that enables offloading classification inside SDN switches and use NIC’s capabilities to directly deliver packets to the right FastClick process, avoiding any inter-core switch. The paper<\/a> was presented at NSDI 2018<\/strong>.<\/a><\/p>\n

After my PhD graduation, I joined the NSLab team at KTH in July 2018, to work on Metron<\/span>‘s next phase, towards a global, low-latency Internet.<\/p>\n

I worked at KTH for 3 years as a post-doc to work on the ULTRA<\/a> project, an ERC consolidated grant awarded to Dejan Kostic<\/a>.<\/p>\n

The goal of the ULTRA project<\/span> is to build internet services with ultra-low latency. We aimed to make the Internet services work at the true speed of the underlying hardware, a bit of which started with Metron<\/span>. The services built by ULTRA will be an enabler for emerging applications such as intelligent transportation systems, the Internet of Things and e-health.<\/p>\n

We observed the exponential growth of both Ethernet speeds and the number of CPU cores called for a new processing model for high-speed networking. Our new approach, RSS++<\/span>, aims to answer the key question in this domain: which CPU core should get an incoming packet? RSS++ achieves very good load balancing over multiple CPU cores by exploiting opportunistic and controlled flow migration (utilizing a new design that enables lockless and zero-copy migration of state between CPU cores). RSS++ paper<\/a> was published at CoNEXT 2019<\/strong><\/a>.<\/p>\n

After addressing the problem of intra-server load-balancing, it was natural to address inter-server load-balancing. We built Cheetah<\/span>, a paper<\/a> publised at NSDI 2020<\/strong><\/a> presenting a new load balancer that solves the challenge of remembering which connection was sent to which server without the traditional trade-off between uniform load balancing and efficiency. Cheetah is up to 5 times faster than stateful load balancers and can support advanced balancing mechanisms that reduce the flow completion time by a factor of 2 to 3x without breaking connections, even while adding and removing servers.<\/p>\n

In our recent PacketMill<\/span> paper<\/a> presented at ASPLOS\u201921<\/a> we showed the limits of current kernel bypass solutions such as DPDK and propose a new buffering model that has improved memory locality. Combined with a pipeline of source-to-source compilation and LLVM passes, the throughput increases by up to 70% for memory intensive network functions. While those improvements are generic, applied to FastClick it becomes the fastest than all the open-source packet processing frameworks publicly available. The extended abstract is already available.<\/p>\n

A lot of stateful high-speed applications rely on connection tracking. We verfore revisited high-speed software <\/span> connection tracking<\/span> on modern servers, using various hash-tables implementations. On top of being a general survey, our paper also study the impact of maintainance, that is deleting connections after some time which is a often a forgotten, but very important aspect of tracking. The paper<\/a> was presented at HPSR 2021<\/strong><\/a>.<\/span><\/p>\n

We then studied SmartNIC<\/span> could help with rules offloading, for connection tracking but also other scenario, as it was used in Metron and RSS++ which led to a paper<\/a> presented at PAM 2021<\/a>.<\/span><\/p>\n

On top of the 3 conferences papers, 2021 saw the realization of 3 extended papers in journals, MiddleClick (ToN)<\/span><\/a>, Metron (ToCS) <\/span><\/a>and Cheetah (ToN)<\/span><\/a>.<\/p>\n

In 2022 we published<\/a>, “Packet Order Matters<\/span>” that won the community award at NSDI 2022<\/strong><\/a>, resulting from my work on ULTRA, finalizing 3 years of post-doc. When packets that need to be processed in the same way are consecutive, i.e., exhibit high temporal and spatial locality, caches deliver great benefits. We built Reframer<\/em>, a software solution that deliberately delays packets and reorders them to increase traffic locality. Despite introducing \u03bcs-scale delays of some packets, Reframer increases the throughput of a network service chain by up to 84% and reduces the flow completion time of a web server by 11% while improving its throughput by 20%. This project contributed an important part of the trivia behind my current research on network schedulers.<\/p>\n

In a collaboration with Zakir Durumeric and his team at Stanford, we published<\/a> Retina<\/span> to be presented in ACM SIGCOMM\u201922<\/a>, a network forensics framework able to answer precise security questions that can withstand up to 160Gbps with zero packet loss. Retina uses Rust compilation-time optimization and hardware offload instead of run-time classification to enable such speeds.<\/p>\n

With the team at KTH, we proposed Ribosome<\/span>, published<\/a> at USENIX NSDI’23 which is splitting headers of packets on a Tofino switch, storing the payload on servers not currently using their full bandwidth using RDMA. Headers are meanwhile sent to an oracle machine. This enables inspection of every packet on the oracle, advanced scheduling use case (Reframer<\/em> itself is one use case) with terabit-worth of data on a single host.<\/p>\n

In July 2021 I started working as a post-doc with the IP Networking Lab (INL)<\/a> of Olivier Bonaventure at the ICTEAM department of UCLouvain, in Belgium. Their expertise on network protocols combined with my expertise on high-speed dataplanes is leading to exciting, but still undergoing work. We published a SIGCOMM CCR editorial about how IPv6 <\/span>addresses might solve many problems, including load-balancing and datacenter disaggregation.<\/p>\n

In 2022 I started as Assistant Professor at UCLouvain. This detailed story therefore stops here, follow the recent articles and look at the ENSG<\/a> page to see what my team is working on!<\/p>\n<\/div>\n\n\n\n

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Publications<\/h1>\n