Complete publication list: [pdf]

Google Scholar profile: [link]

Awards

  • Best Student Design Award (co-recipient) at the IEEE FTFC Conference, for the paper “A 65nm 1V to 0.5V linear regulator with ultra-low quiescent current for mixed-signal ULV SoCs”, Monte-Carlo, Monaco, May 2014. [pdf]
  • Best Paper Award (Circuit and Logic track) at the IEEE International Conference Computer Design (ICCD'08), for the paper “Analysis and minimization of practical energy in 45nm subthreshold logic circuits”, Lake Tahoe, CA, October 2008. [pdf]
  • Best Poster Award at the IEEE International SOI Conference for the poster “Sub-45nm fully-depleted SOI CMOS subthreshold logic for ultra-low-power applications”, New Paltz, NY, October 2008. [pdf]
  • AILv Award (Association des Ingénieurs civils de l'Université catholique de Louvain) for the 2004 M.Sc thesis at Université catholique de Louvain with R. Ambroise and M. Baltus, "Développement d'un flot de synthèse complet pour ASIC's digitaux - Application à la synthèse en technologie SOI haute température du processeur 32-bit LEON et d'un noyau de microcontrôleur 80C51 optimisé", Louvain-la-Neuve, Belgium, June 2005.
  • CLUSTER Academic Excellence Award for the erasmus exchange in embedded systems at the Kungliga Tekniska Högskolan (Royal Institute of Technology) of Stockholm in 2003, Louvain-la-Neuve, Belgium, April 2005.